Interface Design for Core-Based Systems

tems on chips (SOCs) are outpacing the capabilities of design tools and methodologies, resulting in long, expensive design and verification cycles. One way to reduce this complexity is to rapidly compose these systems with predesigned, pretested functional cores available in VHDL libraries.1 Thus, SOCs consist of a few cores that represent complex functions such as filters, sorters, and other primitives. Users can then store these cores in an applicationand organization-specific reuse library (see box). Figure 1 on p. 44 illustrates the generic architecture of an SOC. System designers obtain cores in hard (implemented in a particular technology) or soft (register-transfer-level) format from vendors (often called intellectual property vendors). Cores are integrated via a custom or commercial interconnection network with a controller and a timing and function interface to the external world. Cores can be either new or legacy cores—inherited from existing designs. If the cores come from independent sources, integration and test can be difficult, possibly requiring redesign of the cores to fit a common interface protocol. System designers synthesize the controller during the design cycle according to customer requirements. Both decentralized and centralized controller architectures have appeared in the literature. The conventional core-based design approach (box) is only one part (below the dotted line) of the holistic SOC design methodology shown in Figure 2. The holistic methodology begins with the tasks of capturing requirements, converting them to specifications, and ensuring that the cores meet these specifications both in their behavior and their interaction protocols. (Thus, the early design tasks are concerned with what the SOC should do, while the later stages are concerned with how it should be done.) These custom protocols often lead to communication problems and poor utilization. Therefore, the steps of protocol and architecture design, verification, and refinement are very important. Performance modeling then ensures that the system meets required latency and throughput requirements. Only after completion of these steps can we use conventional core-based design effectively. Library-based design raises new problems. Designers must fully understand how to specify core-based systems at higher levels of abstraction. To correctly specify an existing component from a reuse library, they must properly describe its functional, temporal, and interface properties. By “properly,” we mean that the chosen specification should be precise and machine-processable. The specification can be either formal or inInterface Design for Core-Based Systems INTERFACE DESIGN